David Chen

David Chen / Academic work

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publications

Waferscale Network Switches

Published in ISCA-51st (IEEE Micro Top Pick 2025), 2024

This paper proposes using chiplet-based waferscale integration technology to build waferscale network switches that have 32x higher radix than state-of-the-art switch ASIC.

Recommended citation: S. Chen, S. Pal and R. Kumar, "Waferscale Network Switches," 2024 ACM/IEEE 51st Annual International Symposium on Computer Architecture (ISCA), Buenos Aires, Argentina, 2024, pp. 215-229, doi: 10.1109/ISCA59077.2024.00025. https://davidchen.page/files/Waferscale-Network-Switches.pdf

Waferscale Silicon Photonics Systems: A Cost-Benefit Analysis and Optimization

Published in ICCAD 2025, 2025

Evaluating the performance benefits, power costs, and implementation constraints of silicon photonic interconnects at waferscale.

Recommended citation: R. Bao, Z. Cai, S. Chen, A. Joshi, D. Bunandar and R. Kumar, "Waferscale Silicon Photonics Systems: A Cost-Benefit Analysis and Optimization," 2025 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), Munich, Germany, 2025, pp. 1-9, doi: 10.1109/ICCAD66269.2025.11240761. https://passat.crhc.illinois.edu/iccad25.pdf

CCPA: A Concurrent Content Processing Architecture for Hardware Firewalls

Published in ISPASS 2026, 2026

This paper proposes decoupling stateful inspection from content inspection in hardware firewalls, enabling same-session packets to be content-inspected in parallel across DPCs and delivering up to 14.3x higher throughput than state-of-the-art NGFWs.

Recommended citation: S. Chen, S. Pal and R. Kumar, "CCPA: A Concurrent Content Processing Architecture for Hardware Firewalls," 2026 IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS), Seoul, Korea, Republic of, 2026, pp. 232-243, doi: 10.1109/ISPASS69572.2026.00031. https://davidchen.page/files/CCPA.pdf

talks

teaching

ECE 408 Applied Parallel Programming

Undergraduate course, UIUC, 2023

I’m a teaching assistant for ECE 408 Applied Parallel Programming. I designed and modified the final project for the course where the students need to implement a CNN kernel with CUDA, profile the execution and optimize the performance. I also assisted in crafting problems for the midterms and grading.